1. Field of the Invention
The present invention relates to an emulator, and more specifically to an emulator for developing a single-chip microcomputer having an internal read only memory.
2. Description of the Related Art
Heretofore, an emulator includes a single-chip microcomputer called an "evaluation chip" and at least one external memory called an "emulation memory" in which a program or data to be evaluated is preliminarily stored. To access the emulation memory, two cycles have been required, i.e., an address latch cycle and a program fetch cycle, because the evaluation chip, namely, an ordinary single-chip microcomputer has common terminals through which an address is applied to the emulation memory and an instruction or data is transferred from the emulation memory in time-division manner.
On the other hand, the internal read only memory of a microcomputer tends to have a program fetch cycle of a higher speed. In compliance with this tendency, the emulation memory is required to operate at a high speed. However, such a memory is expensive.
In order to avoid use of such an expensive memory, it is considered to separate the address terminals and the data terminals of the evaluation chip from each other. In this case, it is sufficient if one fetch operation includes only one cycle, and therefore, even if a low speed emulation memory is used, evaluation can be performed at a high speed. However, the separation of the address terminals and the data terminals results in increase of the number of terminal pins of the evaluation chip, and therefore, this method is not practical.